Sciweavers

40 search results - page 8 / 8
» A generalized algorithm for graph-coloring register allocati...
Sort
View
PLDI
2003
ACM
13 years 10 months ago
A provably sound TAL for back-end optimization
Typed assembly languages provide a way to generate machinecheckable safety proofs for machine-language programs. But the soundness proofs of most existing typed assembly languages...
Juan Chen, Dinghao Wu, Andrew W. Appel, Hai Fang
EMSOFT
2005
Springer
13 years 10 months ago
Using de-optimization to re-optimize code
The nature of embedded systems development places a great deal of importance on meeting strict requirements in areas such as static code size, power consumption, and execution tim...
Stephen Hines, Prasad Kulkarni, David B. Whalley, ...
IWMM
1998
Springer
115views Hardware» more  IWMM 1998»
13 years 9 months ago
One-Bit Counts between Unique and Sticky
Stoye's one-bit reference tagging scheme can be extended to local counts of two or more via two strategies. The first, suited to pure register transactions, is a cache of ref...
David J. Roth, David S. Wise
FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
13 years 5 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
DAC
2003
ACM
14 years 6 months ago
Behavioral consistency of C and verilog programs using bounded model checking
We present an algorithm that checks behavioral consistency between an ANSI-C program and a circuit given in Verilog using Bounded Model Checking. Both the circuit and the program ...
Edmund M. Clarke, Daniel Kroening, Karen Yorav