35 search results - page 6 / 7 » A grid-aware MIP solver: Implementation and case studies |
SIGMETRICS
1997
ACM
13 years 9 months ago
1997
ACM
In this paper we present a performance study of memory reference behavior in network protocol processing, using an Internet-based protocol stack implemented in the x-kernel runnin...
ISCA
1996
IEEE
13 years 9 months ago
1996
IEEE
Memory latency is an important bottleneck in system performance that cannot be adequately solved by hardware alone. Several promising software techniques have been shown to addres...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
Increasing reliability at a minimum amount of extra cost is a major challenge in todays ECU network design. Considering reliability as an objective already in early design phases ...
ENTCS
2008
13 years 5 months ago
2008
ion in PRISM1 Mark Kattenbelt Marta Kwiatkowska Gethin Norman David Parker Oxford University Computing Laboratory, Oxford, UK Modelling and verification of systems such as communi...
POPL
2009
ACM
14 years 5 months ago
2009
ACM
We present a unified approach to type checking and property checking for low-level code. Type checking for low-level code is challenging because type safety often depends on compl...