This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...
High performance intra-node communication support for MPI applications is critical for achieving best performance from clusters of SMP workstations. Present day MPI stacks cannot ...
Hyun-Wook Jin, Sayantan Sur, Lei Chai, Dhabaleswar...
-- In a WAN established infrastructure, one of the main problems ATM network planners and users face, when greater than T1/E1 bandwidth is required, is the high cost associated to ...
: In this paper, a multiservice, local-area, wireless access ATM system is explored from a signaling protocol viewpoint. The signaling architecture considered here follows the sign...
Nikolaos H. Loukas, Nikos I. Passas, Lazaros F. Me...
’s point-to-point communications abstractions, described in this paper, handle several different communications scenarios, with a portable, high-performance design and tation. ...
Richard L. Graham, Brian Barrett, Galen M. Shipman...