13 search results - page 3 / 3 » A high-level DRAM timing, power and area exploration tool |
ERSA
2008
13 years 6 months ago
2008
Partial reconfiguration (PR) reveals many opportunities for integration into FPGA design for potential system optimizations such as reduced area, increased performance, and increa...
INFOCOM
2005
IEEE
13 years 10 months ago
2005
IEEE
—IP-Lookup is a challenging problem because of the increasing routing table sizes, increased traffic, and higher speed links. These characteristics lead to the prevalence of hard...
CVPR
2008
IEEE
14 years 6 months ago
2008
IEEE
The Internet contains billions of images, freely available online. Methods for efficiently searching this incredibly rich resource are vital for a large number of applications. Th...