Sciweavers

315 search results - page 63 / 63
» A low complexity hardware architecture for motion estimation
Sort
View
PPOPP
2009
ACM
14 years 6 months ago
An efficient transactional memory algorithm for computing minimum spanning forest of sparse graphs
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...
Seunghwa Kang, David A. Bader
CONEXT
2009
ACM
13 years 6 months ago
SafeGuard: safe forwarding during route changes
This paper presents the design and evaluation of SafeGuard, an intra-domain routing system that can safely forward packets to their destinations even when routes are changing. Saf...
Ang Li, Xiaowei Yang, David Wetherall
RTAS
2010
IEEE
13 years 4 months ago
DARTS: Techniques and Tools for Predictably Fast Memory Using Integrated Data Allocation and Real-Time Task Scheduling
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
Sangyeol Kang, Alexander G. Dean
BMCBI
2008
186views more  BMCBI 2008»
13 years 5 months ago
Variable selection for large p small n regression models with incomplete data: Mapping QTL with epistases
Background: Identifying quantitative trait loci (QTL) for both additive and epistatic effects raises the statistical issue of selecting variables from a large number of candidates...
Min Zhang, Dabao Zhang, Martin T. Wells
MOBISYS
2007
ACM
14 years 5 months ago
Triage: balancing energy and quality of service in a microserver
The ease of deployment of battery-powered and mobile systems is pushing the network edge far from powered infrastructures. A primary challenge in building untethered systems is of...
Nilanjan Banerjee, Jacob Sorber, Mark D. Corner, S...