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STOC
1993
ACM
141views Algorithms» more  STOC 1993»
13 years 9 months ago
Bounds for the computational power and learning complexity of analog neural nets
Abstract. It is shown that high-order feedforward neural nets of constant depth with piecewisepolynomial activation functions and arbitrary real weights can be simulated for Boolea...
Wolfgang Maass
ASYNC
2002
IEEE
150views Hardware» more  ASYNC 2002»
13 years 10 months ago
Clock Synchronization through Handshake Signalling
We present a method for synchronizing pausible clocks in GALS (Globally Asynchronous, Locally Synchronous) systems. In contrast to most conventional GALS schemes the method is not...
Joep L. W. Kessels, Suk-Jin Kim, Ad M. G. Peeters,...
DAC
2008
ACM
14 years 5 months ago
Statistical modeling and simulation of threshold variation under dopant fluctuations and line-edge roughness
The threshold voltage (Vth) of a nanoscale transistor is severely affected by random dopant fluctuations and line-edge roughness. The analysis of these effects usually requires at...
Yun Ye, Frank Liu, Sani R. Nassif, Yu Cao
MTDT
2003
IEEE
164views Hardware» more  MTDT 2003»
13 years 10 months ago
Applying Defect-Based Test to Embedded Memories in a COT Model
ct Defect-based testing for digital logic concentrates primarily on methods of test application, including for example at-speed structural tests and IDDQ testing. In contrast, defe...
Robert C. Aitken
DAC
1994
ACM
13 years 9 months ago
Exact Minimum Cycle Times for Finite State Machines
In current research, the minimum cycle times of finite state machines are estimated by computing the delays of the combinational logic in the finite state machines. Even though th...
William K. C. Lam, Robert K. Brayton, Alberto L. S...