3 search results - page 1 / 1 » A mixed-clock issue queue design for globally asynchronous, ... |
ISLPED
2003
ACM
13 years 9 months ago
2003
ACM
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
ASPDAC
2004
ACM
13 years 8 months ago
2004
ACM
- Globally-Asynchronous, Locally-Synchronous (GALS) design style has started to gain interest recently as a possible solution to the increased design complexity, power and thermal ...
HIPEAC
2007
Springer
13 years 10 months ago
2007
Springer
Caches are designed to provide the best tradeoff between access speed and capacity for a set of target applications. Unfortunately, different applications, and even different phas...