11 search results - page 2 / 3 » A modular simulation framework for architectural exploration... |
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
— Current Systems-On-Chip execute applications that demand extensive parallel processing. Networks-On-Chip (NoC) provide a structured way of realizing interconnections on silicon...
ISCA
2009
IEEE
13 years 11 months ago
2009
IEEE
Conventional oblivious routing algorithms are either not application-aware or assume that each flow has its own private channel to ensure deadlock avoidance. We present a framewo...
DAC
2006
ACM
13 years 6 months ago
2006
ACM
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
DAC
2002
ACM
14 years 5 months ago
2002
ACM
In this paper, we introduce a framework to estimate the power consumption on switch fabrics in network routers. We propose different modeling methodologies for node switches, inte...
ICS
2009
Tsinghua U.
13 years 9 months ago
2009
Tsinghua U.
New static source routing algorithms for High Performance Computing (HPC) are presented in this work. The target parallel architectures are based on the commonly used fattree netw...