172 search results - page 4 / 35 » A multiprocessor architecture for the massively parallel mod... |
IPPS
2007
IEEE
14 years 14 days ago
2007
IEEE
We present a study of multithreaded implementations of Thorup’s algorithm for solving the Single Source Shortest Path (SSSP) problem for undirected graphs. Our implementations l...
TSE
1998
13 years 5 months ago
1998
—This paper demonstrates the use of a model-based evaluation approach for instrumentation systems (ISs). The overall objective of this study is to provide early feedback to tool ...
EUROPAR
2008
Springer
13 years 8 months ago
2008
Springer
We describe a software solution to the problem of automatic parallelization of linear algebra code on multi-processor and multi-core architectures. This solution relies on the defi...
PPOPP
2010
ACM
14 years 20 days ago
2010
ACM
In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
HPCC
2005
Springer
13 years 11 months ago
2005
Springer
In this paper we present an exhaustive evaluation of the memory subsystem in a chip-multiprocessor (CMP) architecture composed of 16 cores. The characterization is performed making...