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ICCAD
2004
IEEE
155views Hardware» more  ICCAD 2004»
14 years 2 months ago
A flexibility aware budgeting for hierarchical flow timing closure
—In this paper, we present a new block budgeting algorithm which speeds up timing closure in timing driven hierarchical flows. After a brief description of the addressed flow, ...
Olivier Omedes, Michel Robert, Mohammed Ramdani
ISQED
2005
IEEE
81views Hardware» more  ISQED 2005»
13 years 10 months ago
Exact Algorithms for Coupling Capacitance Minimization by Adding One Metal Layer
Due to the rapid development of manufacturing process technology and tight marketing schedule, the chip design and manufacturing always work toward an integrated solution to achie...
Hua Xiang, Kai-Yuan Chao, Martin D. F. Wong
TC
2008
13 years 5 months ago
Counter-Based Cache Replacement and Bypassing Algorithms
Recent studies have shown that, in highly associative caches, the performance gap between the Least Recently Used (LRU) and the theoretical optimal replacement algorithms is large,...
Mazen Kharbutli, Yan Solihin
FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
13 years 11 months ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
CIKM
2007
Springer
13 years 11 months ago
Optimal proactive caching in peer-to-peer network: analysis and application
As a promising new technology with the unique properties like high efficiency, scalability and fault tolerance, Peer-toPeer (P2P) technology is used as the underlying network to b...
Weixiong Rao, Lei Chen 0002, Ada Wai-Chee Fu, Ying...