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ICDCS
2010
IEEE
13 years 9 months ago
A New Buffer Cache Design Exploiting Both Temporal and Content Localities
: This paper presents a Least Popularly Used buffer cache algorithm to exploit both temporal locality and content locality of I/O requests. Popular data blocks are selected as refe...
Jin Ren, Qing Yang
BMCBI
2008
108views more  BMCBI 2008»
13 years 5 months ago
SPRINT: A new parallel framework for R
Background: Microarray analysis allows the simultaneous measurement of thousands to millions of genes or sequences across tens to thousands of different samples. The analysis of t...
Jon Hill, Matthew Hambley, Thorsten Forster, Murie...
SC
2003
ACM
13 years 10 months ago
Compiler Support for Exploiting Coarse-Grained Pipelined Parallelism
The emergence of grid and a new class of data-driven applications is making a new form of parallelism desirable, which we refer to as coarse-grained pipelined parallelism. This pa...
Wei Du, Renato Ferreira, Gagan Agrawal
CODES
2010
IEEE
13 years 3 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
VLSID
2001
IEEE
164views VLSI» more  VLSID 2001»
14 years 5 months ago
An Efficient Parallel Transparent Bist Method For Multiple Embedded Memory Buffers
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das