9 search results - page 1 / 2 » A novel synthesis approach for active leakage power reductio... |
DAC
2005
ACM
14 years 5 months ago
2005
ACM
: Due to exponential increase in subthreshold leakage with technology scaling and temperature increase, leakage power is becoming a major fraction of total power in the active mode...
ISCAS
2007
IEEE
13 years 10 months ago
2007
IEEE
—On-chip decoupling capacitors (decaps) are generally used to reduce power supply noise. Passive decap designs are reaching their limits in 90nm CMOS technology due to higher ope...
TIM
2010
12 years 11 months ago
2010
In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generating the ...
VLSID
2007
IEEE
14 years 4 months ago
2007
IEEE
We present minimization methodologies and an algorithm for simultaneous scheduling, binding, and allocation for the reduction of total power and power fluctuation during behaviora...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
— Clock power consumes a significant fraction of total power dissipation in high speed precharge/evaluate logic styles. In this paper, we present a novel low-cost design methodol...