Sciweavers

12 search results - page 1 / 3
» A performance and power analysis of WK-Recursive and Mesh Ne...
Sort
View
ICMCS
2005
IEEE
109views Multimedia» more  ICMCS 2005»
13 years 10 months ago
H.264 HDTV Decoder Using Application-Specific Networks-On-Chip
This paper studied an H.264 HDTV decoder on two multiprocessor system-on-chip architectures. Two types of networks-on-chip, the RAW network and the applicationspecific networks-on...
Jiang Xu, Wayne Wolf, Jörg Henkel, Srimat T. ...
IESS
2007
Springer
165views Hardware» more  IESS 2007»
13 years 10 months ago
Data Reuse Driven Memory and Network-On-Chip Co-Synthesis
NoCs present a possible communication infrastructure solution to deal with increased design complexity and shrinking time-to-market. The communication infrastructure is a signific...
Ilya Issenin, Nikil Dutt
ICCD
2006
IEEE
182views Hardware» more  ICCD 2006»
14 years 1 months ago
A performance and power analysis of WK-Recursive and Mesh Networks for Network-on-Chips
—Network-on-Chip (NoC) has been proposed as an attractive alternative to traditional dedicated wires to achieve high performance and modularity. Power efficiency is one of the mo...
Dara Rahmati, Abbas Eslami Kiasari, Shaahin Hessab...
INTEGRATION
2008
183views more  INTEGRATION 2008»
13 years 4 months ago
Network-on-Chip design and synthesis outlook
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
David Atienza, Federico Angiolini, Srinivasan Mura...
ICCAD
2000
IEEE
138views Hardware» more  ICCAD 2000»
13 years 9 months ago
Fast Analysis and Optimization of Power/Ground Networks
This paper presents an efficient method for optimizing power/ground (P/G) networks by widening wires and adding decoupling capacitors (decaps). It proposes a structured skeleton t...
Haihua Su, Kaushik Gala, Sachin S. Sapatnekar