23 search results - page 1 / 5 » A power and temperature aware DRAM architecture |
DAC
2008
ACM
14 years 5 months ago
2008
ACM
Technological advances enable modern processors to utilize increasingly larger DRAMs with rising access frequencies. This is leading to high power consumption and operating temper...
HPCA
2006
IEEE
14 years 4 months ago
2006
IEEE
Measurements of an off-the-shelf DRAM chip confirm that different cells retain information for different amounts of time. This result extends to DRAM rows, or pages (retention tim...
APCSAC
2007
IEEE
13 years 8 months ago
2007
IEEE
Many years of CMOS technology scaling have resulted in increased power densities and higher core temperatures. Power and temperature concerns are now considered to be a primary cha...
VLSID
2007
IEEE
13 years 10 months ago
2007
IEEE
In this paper we demonstrate the impact of the floorplan on the temperature-dependent leakage power of a System on Chip (SoC). We propose a novel system level temperature aware a...
VLSID
2008
IEEE
14 years 4 months ago
2008
IEEE
Technology scaling has resulted in an exponential increase in the leakage power as well as the variations in leakage power of fabricated chips. Functional units (FUs), like Intege...