3 search results - page 1 / 1 » A reconfigurable cache memory with heterogeneous banks |
DATE
2010
IEEE
13 years 9 months ago
2010
IEEE
Abstract— The optimal size of a large on-chip cache can be different for different programs: at some point, the reduction of cache misses achieved when increasing cache size hits...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
ANCS
2007
ACM
13 years 8 months ago
2007
ACM
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...