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DATE
2006
IEEE
91views Hardware» more  DATE 2006»
13 years 9 months ago
Efficient incremental clock latency scheduling for large circuits
The clock latency scheduling problem is usually solved on the sequential graph, also called register-to-register graph. In practice, the the extraction of the sequential graph for...
Christoph Albrecht
WSC
2007
13 years 7 months ago
Controlled sequential bifurcation for software reliability study
Computer simulation is an appealing approach for the reliability analysis of structure-based software systems as it can accommodate important complexities present in realistic sys...
Jun Xu, Feng Yang, Hong Wan
BMCBI
2011
12 years 12 months ago
Sequential Interim Analyses of Survival Data in DNA Microarray Experiments
Background: Discovery of biomarkers that are correlated with therapy response and thus with survival is an important goal of medical research on severe diseases, e.g. cancer. Freq...
Andreas Leha, Tim Beißbarth, Klaus Jung
ICCAD
2004
IEEE
180views Hardware» more  ICCAD 2004»
14 years 2 months ago
Physical placement driven by sequential timing analysis
Traditional timing-driven placement considers only combinational delays and does not take into account the potential of subsequent sequential optimization steps. As a result, the ...
Aaron P. Hurst, Philip Chong, Andreas Kuehlmann
ICCAD
1999
IEEE
75views Hardware» more  ICCAD 1999»
13 years 9 months ago
Functional timing optimization
A common approach to performance optimization of circuits focuses on re-synthesis to reduce the length of all paths greater than the desired delay . We describe a new delay optimi...
Alexander Saldanha