33 search results - page 1 / 7 » A solenoidal basis method for efficient inductance extractio... |
DAC
2002
ACM
14 years 5 months ago
2002
ACM
The ability to compute the parasitic inductance of the interconnect is critical to the timing verification of modern VLSI circuits. A challenging aspect of inductance extraction i...
IPPS
2002
IEEE
13 years 9 months ago
2002
IEEE
Accurate estimation of signal delay is critical to the design and verification of VLSI circuits. At very high frequencies, signal delay in circuits with small feature sizes is do...
TVLSI
2002
13 years 4 months ago
2002
We propose two practical approaches for on-chip inductance extraction to obtain a highly sparsified and accurate inverse inductance matrix K. Both approaches differ from previous ...
JCIT
2010
12 years 11 months ago
2010
With the development of telecom business, customer churn prediction becomes more and more important. An outstanding issue in customer churn prediction is high dimensional problem....
ICCAD
1992
IEEE
13 years 8 months ago
1992
IEEE
In this paper we describe combining a mesh analysis equation formulation technique with a preconditioned GORES matrix solution algorithm to accelerate the determination of inducta...