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ICCD
2006
IEEE
103views Hardware» more  ICCD 2006»
14 years 16 days ago
Architectural Support for Run-Time Validation of Control Flow Transfer
—Current micro-architecture blindly uses the address in the program counter to fetch and execute instructions without validating its legitimacy. Whenever this blind-folded instru...
Yixin Shi, Sean Dempsey, Gyungho Lee
MICRO
1994
IEEE
118views Hardware» more  MICRO 1994»
13 years 7 months ago
Characterizing the impact of predicated execution on branch prediction
Branch instructions are recognized as a major impediment to exploiting instruction level parallelism. Even with sophisticated branch prediction techniques, many frequently execute...
Scott A. Mahlke, Richard E. Hank, Roger A. Bringma...
CJ
1999
126views more  CJ 1999»
13 years 3 months ago
Source Level Static Branch Prediction
The ability to predict the directions of branches, especially conditional branches, is an important problem in modern computer architecture and advanced compilers. Many static and...
W. F. Wong
ISCA
1998
IEEE
102views Hardware» more  ISCA 1998»
13 years 7 months ago
Dynamic History-length Fitting: A Third Level of Adaptivity for Branch Prediction
Accurate branch prediction is essential for obtaining high performance in pipelined superscalar processors that execute instructions speculatively. Some of the best current predic...
Toni Juan, Sanji Sanjeevan, Juan J. Navarro
ECRTS
2005
IEEE
13 years 9 months ago
A WCET-Oriented Static Branch Prediction Scheme for Real Time Systems
Branch prediction mechanisms are becoming commonplace within current generation processors. Dynamic branch predictors, albeit able to predict branches quite accurately in average,...
François Bodin, Isabelle Puaut