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» A tagless coherence directory
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HPCA
1999
IEEE
13 years 9 months ago
Using Lamport Clocks to Reason about Relaxed Memory Models
Cache coherence protocols of current shared-memory multiprocessors are difficult to verify. Our previous work proposed an extension of Lamport's logical clocks for showing th...
Anne Condon, Mark D. Hill, Manoj Plakal, Daniel J....
SRDS
1994
IEEE
13 years 9 months ago
Coordinated Checkpointing-Rollback Error Recovery for Distributed Shared Memory Multicomputers
Most recovery schemes that have been proposed for Distributed Shared Memory (DSM) systems require unnecessarily high checkpointing frequency and checkpoint traffic, which are sens...
G. Janakiraman, Yuval Tamir
ASPLOS
2000
ACM
13 years 9 months ago
Architecture and design of AlphaServer GS320
This paper describes the architecture and implementation of the AlphaServer GS320, a cache-coherent non-uniform memory access multiprocessor developed at Compaq. The AlphaServer G...
Kourosh Gharachorloo, Madhu Sharma, Simon Steely, ...
WWW
2004
ACM
14 years 6 months ago
Practical semantic analysis of web sites and documents
As Web sites are now ordinary products, it is necessary to explicit the notion of quality of a Web site. The quality of a site may be linked to the easiness of accessibility and a...
Thierry Despeyroux