8 search results - page 2 / 2 » A variation-tolerant scheduler for better than worst-case be... |
CODES
2003
IEEE
13 years 10 months ago
2003
IEEE
In this paper, we describe a new methodology based on game theory for minimizing the average power of a circuit during scheduling in behavioral synthesis. The problem of schedulin...
ICCAD
2002
IEEE
14 years 1 months ago
2002
IEEE
Multiport memories are extensively used in modern system designs because of the performance advantages they offer. The increased memory access throughput could lead to significan...
LCTRTS
2010
Springer
13 years 2 months ago
2010
Springer
Concurrent Action-Oriented Specifications (CAOS) model the behavior of a synchronous hardware circuit as asynchronous guarded at an abstraction level higher than the Register Tran...