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GLOBECOM
2006
IEEE
13 years 12 months ago
Interleaved Multistage Switching Fabrics for Scalable High Performance Routers
As the Internet grows exponentially, scalable high performance routers and switches on backbone are required to provide a large number of ports, higher throughput, lower delay late...
Rongsen He, José G. Delgado-Frias
DATE
1999
IEEE
194views Hardware» more  DATE 1999»
13 years 10 months ago
CRUSADE: Hardware/Software Co-Synthesis of Dynamically Reconfigurable Heterogeneous Real-Time Distributed Embedded Systems
Dynamically reconfigurable embedded systems offer potential for higher performance as well as adaptability to changing system requirements at low cost. Such systems employ run-tim...
Bharat P. Dav
RTSS
1998
IEEE
13 years 10 months ago
Improved Response-Time Analysis Calculations
Schedulability analysis of fixed priority preemptive scheduled systems can be performed by calculating the worst-case response-time of the involved processes. The system is deemed...
Mikael Sjödin, Hans Hansson
SIGMETRICS
1997
ACM
153views Hardware» more  SIGMETRICS 1997»
13 years 10 months ago
Queue Management for Explicit Rate Based Congestion Control
Rate based congestion control has been considered desirable, both to deal with the high bandwidth-delay products of today's high speed networks, and to match the needs of eme...
Qingming Ma, K. K. Ramakrishnan
ISCA
1994
IEEE
129views Hardware» more  ISCA 1994»
13 years 10 months ago
Software Versus Hardware Shared-Memory Implementation: A Case Study
We comparethe performance of software-supported shared memory on a general-purpose network to hardware-supported shared memory on a dedicated interconnect. Up to eight processors,...
Alan L. Cox, Sandhya Dwarkadas, Peter J. Keleher, ...