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EUC
2006
Springer
13 years 9 months ago
Custom Instruction Generation Using Temporal Partitioning Techniques for a Reconfigurable Functional Unit
Extracting appropriate custom instructions is an important phase for implementing an application on an extensible processor with a reconfigurable functional unit (RFU). Custom inst...
Farhad Mehdipour, Hamid Noori, Morteza Saheb Zaman...
USENIX
2003
13 years 7 months ago
The Design of the {OpenBSD} Cryptographic Framework
Cryptographic transformations are a fundamental building block in many security applications and protocols. To improve performance, several vendors market hardware accelerator car...
Angelos D. Keromytis, Jason L. Wright, Theo de Raa...
DATE
2006
IEEE
195views Hardware» more  DATE 2006»
13 years 11 months ago
Application specific instruction processor based implementation of a GNSS receiver on an FPGA
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...
Götz Kappen, Tobias G. Noll
DAC
2002
ACM
14 years 6 months ago
Exploiting operation level parallelism through dynamically reconfigurable datapaths
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
Zhining Huang, Sharad Malik
ARC
2008
Springer
155views Hardware» more  ARC 2008»
13 years 7 months ago
Run-time Adaptable Architectures for Heterogeneous Behavior Embedded Systems
As embedded applications are getting more complex, they are also demanding highly diverse computational capabilities. The majority of all previously proposed reconfigurable archite...
Antonio Carlos Schneider Beck, Mateus B. Rutzig, G...