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» Accelerating Retiming Under the Coupled-Edge Timing Model
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CORR
2006
Springer
112views Education» more  CORR 2006»
13 years 5 months ago
High-level synthesis under I/O Timing and Memory constraints
The design of complex Systems-on-Chips implies to take into account communication and memory access constraints for the integration of dedicated hardware accelerator. In this paper...
Philippe Coussy, Gwenolé Corre, Pierre Bome...
TR
2010
159views Hardware» more  TR 2010»
13 years 14 days ago
Accelerated Degradation Tests Applied to Software Aging Experiments
Abstract--In the past ten years, the software aging phenomenon has been systematically researched, and recognized by both academic, and industry communities as an important obstacl...
Rivalino Matias, Pedro Alberto Barbetta, Kishor S....
ICMCS
2006
IEEE
186views Multimedia» more  ICMCS 2006»
13 years 11 months ago
GPU Accelerated Inverse Photon Mapping for Real-Time Surface Reflectance Modeling
This paper investigates the problem of object surface reflectance modeling, which is sometimes referred to as inverse reflectometry, for photorealistic rendering and effective m...
Takashi Machida, Naokazu Yokoya, Haruo Takemura
ATAL
2008
Springer
13 years 7 months ago
Norm emergence under constrained interactions in diverse societies
Effective norms, emerging from sustained individual interactions over time, can complement societal rules and significantly enhance performance of individual agents and agent soci...
Partha Mukherjee, Sandip Sen, Stéphane Airi...
ASAP
2009
IEEE
141views Hardware» more  ASAP 2009»
14 years 2 months ago
Accelerating a Virtual Ecology Model with FPGAs
—This paper describes the acceleration of virtual ecology models using field-programmable gate arrays (FPGAs). Our approach targets models generated by the Virtual Ecology Workb...
Julien Lamoureux, Tony Field, Wayne Luk