Sciweavers

4 search results - page 1 / 1
» Accelerating Scientific Applications with the SRC-6 Reconfig...
Sort
View
IPPS
2005
IEEE
13 years 10 months ago
Accelerating Scientific Applications with the SRC-6 Reconfigurable Computer: Methodologies and Analysis
Reconfigurable computing offers the promise of performing computations in hardware to increase performance and efficiency while retaining much of the flexibility of a software sol...
Melissa C. Smith, Jeffrey S. Vetter, Xuejun Liang
DATE
2004
IEEE
107views Hardware» more  DATE 2004»
13 years 8 months ago
A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms
In this paper, we propose a methodology for partitioning and mapping computational intensive applications in reconfigurable hardware blocks of different granularity. A generic hyb...
Michalis D. Galanis, Athanasios Milidonis, George ...
ERSA
2007
177views Hardware» more  ERSA 2007»
13 years 5 months ago
Energy-Aware System Synthesis for Reconfigurable Chip Multiprocessors
- Even though state-of-the-art FPGAs present new opportunities in exploring low-cost high-performance architectures for floating-point scientific applications, they also pose serio...
Xiaofang Wang, Sotirios G. Ziavras, Jie Hu
IPPS
2007
IEEE
13 years 10 months ago
Pipelining Tradeoffs of Massively Parallel SuperCISC Hardware Functions
Parallel processing using multiple processors is a well-established technique to accelerate many different classes of applications. However, as the density of chips increases, ano...
Colin J. Ihrig, Justin Stander, Alex K. Jones