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CODES
2007
IEEE
13 years 10 months ago
Three-dimensional multiprocessor system-on-chip thermal optimization
3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density...
Chong Sun, Li Shang, Robert P. Dick
3DIC
2009
IEEE
153views Hardware» more  3DIC 2009»
13 years 11 months ago
Junction-level thermal extraction and simulation of 3DICs
Abstract—In 3DICs heat dissipating devices are stacked directly on top of each other leading to a higher heat density than in a comparable 2D chip. 3D integration also moves the ...
Samson Melamed, Thorlindur Thorolfsson, Adi Sriniv...
DAC
2011
ACM
12 years 4 months ago
Thermal-aware cell and through-silicon-via co-placement for 3D ICs
Existing thermal-aware 3D placement methods assume that the temperature of 3D ICs can be optimized by properly distributing the power dissipations, and ignoring the heat conductiv...
Jason Cong, Guojie Luo, Yiyu Shi
DAGSTUHL
1994
13 years 5 months ago
Infrared Image Understanding
In this article, we present how it is possible to recover physical parameters of objects such as reflectivity, emissivity and thermal inertia from the analysis of infrared images ...
Claude Caillas
IJBC
2007
90views more  IJBC 2007»
13 years 4 months ago
Extended Phase Diagram of the Lorenz Model
The parameter dependence of the various attractive solutions of the three variable nonlinear Lorenz model equations for thermal convection in Rayleigh-B´enard flow is studied. I...
H. R. Dullin, S. Schmidt, P. H. Richter, S. K. Gro...