7 search results - page 1 / 2 » Accurate estimation of global buffer delay within a floorpla... |
ICCAD
2004
IEEE
14 years 1 months ago
2004
IEEE
Closed formed expressions for buffered interconnect delay approximation have been around for some time. However, previous approaches assume that buffers are free to be placed anyw...
ASPDAC
2007
ACM
13 years 8 months ago
2007
ACM
- Advanced process technologies impose more significant challenges especially when manufactured circuits exhibit substantial process variations. Consideration of process variations...
DATE
1999
IEEE
13 years 9 months ago
1999
IEEE
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
ICCAD
2006
IEEE
14 years 1 months ago
2006
IEEE
Most existing buffering algorithms neglect the impact of inductance on circuit performance, which causes large error in circuit analysis and optimization. Even for the approaches...
TC
2008
13 years 4 months ago
2008
While many block replacement algorithms for buffer caches have been proposed to address the wellknown drawbacks of the LRU algorithm, they are not robust and cannot maintain a cons...