47 search results - page 1 / 10 » Adaptive prefetching for shared cache based chip multiproces... |
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
Abstract—Chip multiprocessors (CMPs) present a unique scenario for software data prefetching with subtle tradeoffs between memory bandwidth and performance. In a shared L2 based ...
PPOPP
2009
ACM
14 years 5 months ago
2009
ACM
Data prefetching has been widely used in the past as a technique for hiding memory access latencies. However, data prefetching in multi-threaded applications running on chip multi...
HPCA
2005
IEEE
14 years 4 months ago
2005
IEEE
In this paper, we study the instruction cache miss behavior of four modern commercial applications (a database workload, TPC-W, SPECjAppServer2002 and SPECweb99). These applicatio...
HIPEAC
2009
Springer
13 years 8 months ago
2009
Springer
This paper proposes and studies a hardware-based adaptive controlled migration strategy for managing distributed L2 caches in chip multiprocessors. Building on an area-efficient sh...
ISCA
2010
IEEE
13 years 9 months ago
2010
IEEE
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...