47 search results - page 2 / 10 » Adaptive prefetching for shared cache based chip multiproces... |
HPCA
2007
IEEE
13 years 11 months ago
2007
IEEE
The significant speed-gap between processor and memory and the limited chip memory bandwidth make last-level cache performance crucial for future chip multiprocessors. To use the...
SRDS
1998
IEEE
13 years 9 months ago
1998
IEEE
Software-controlled cache prefetching and data forwarding are widely used techniques for tolerating memory latency in shared memory multiprocessors. However, some previous studies...
IEEEPACT
2000
IEEE
13 years 9 months ago
2000
IEEE
A multiprocessor prefetch scheme is described in which a miss is followed by a prefetch of a group of lines, a neighborhood, surrounding the demand-fetched line. The neighborhood ...
ASPLOS
2008
ACM
13 years 6 months ago
2008
ACM
ICCD
2011
IEEE
12 years 4 months ago
2011
IEEE
—A key challenge in chip multiprocessor (CMP) design is to optimize the performance within a power budget limited by the CMP’s cooling, packaging, and power supply capacities. ...