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» Aggressive Dynamic Execution of Multimedia Kernel Traces
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MICRO
2002
IEEE
97views Hardware» more  MICRO 2002»
13 years 10 months ago
Instruction fetch deferral using static slack
In this paper we present an approach to boosting performance and tolerating latency by deferring non-critical instructions into a deferred queue for later processing. As such, ins...
Gregory A. Muthler, David Crowe, Sanjay J. Patel, ...
ISCA
2010
IEEE
340views Hardware» more  ISCA 2010»
13 years 10 months ago
Necromancer: enhancing system throughput by animating dead cores
Aggressive technology scaling into the nanometer regime has led to a host of reliability challenges in the last several years. Unlike onchip caches, which can be efficiently prot...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...
HPCA
1999
IEEE
13 years 9 months ago
Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance
In general-purpose microprocessors, recent trends have pushed towards 64-bit word widths, primarily to accommodate the large addressing needs of some programs. Many integer proble...
David Brooks, Margaret Martonosi
CGO
2007
IEEE
13 years 9 months ago
Shadow Profiling: Hiding Instrumentation Costs with Parallelism
In profiling, a tradeoff exists between information and overhead. For example, hardware-sampling profilers incur negligible overhead, but the information they collect is consequen...
Tipp Moseley, Alex Shye, Vijay Janapa Reddi, Dirk ...