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ISCAS
2003
IEEE
126views Hardware» more  ISCAS 2003»
13 years 10 months ago
A methodology for implementing FIR filters and CAD tool development for designing RNS-based systems
The goal of the research is twofold First, the derivation of a design methodology for FIR filters implementation based on Residue Number System (RNS), aiming at power, delay and h...
Dimitrios Soudris, K. Sgouropoulos, Konstantinos T...
AHS
2006
IEEE
195views Hardware» more  AHS 2006»
13 years 11 months ago
An Efficient Hardware Architecture for H.264 Adaptive Deblocking Filter
This paper presents an efficient hardware architecture for real-time implementation of adaptive deblocking filter algorithm used in H.264 video coding standard. This hardware is d...
Mustafa Parlak, Ilker Hamzaoglu
AVSS
2007
IEEE
13 years 5 months ago
A particle filter based fusion framework for video-radio tracking in smart spaces
One of the main issues for Ambient Intelligence (AmI) systems is to continuously localize the user and to detect his/her identity in order to provide dedicated services. A video-r...
Alessio Dore, Andrea F. Cattoni, Carlo S. Regazzon...
MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
13 years 10 months ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...
VLSISP
2010
148views more  VLSISP 2010»
13 years 3 months ago
Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive
Abstract Polyphase channelizer is an important component of subband adaptive filtering systems. This paper presents an energy-efficient hardware architecture and VLSI implementatio...
Yongtao Wang, Hamid Mahmoodi, Lih-Yih Chiou, Hunso...