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RTI
2000
113views more  RTI 2000»
13 years 4 months ago
Algorithms for Fractal Image Compression on Massively Parallel SIMD Arrays
In this work we introduce and analyze algorithms for fractal image compression on massively parallel SIMD arrays. The di erent algorithms discussed di er signi cantly in terms of ...
Christian Hufnagl, Andreas Uhl
ISCAS
2003
IEEE
144views Hardware» more  ISCAS 2003»
13 years 10 months ago
A flexible global readout architecture for an analogue SIMD vision chip
A new vision chip, SCAMP-2, has been developed in a 0.35µm CMOS technology. In this paper, the design of the chip is presented, with particular emphasis on its readout architectu...
Piotr Dudek
ICPPW
2006
IEEE
13 years 10 months ago
Retargeting Image-Processing Algorithms to Varying Processor Grain Sizes
Embedded computing architectures can be designed to meet a variety of application specific requirements. However, optimized hardware can require compiler support to realize the po...
Sam Sander, Linda M. Wills