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» Algorithms for the automatic extension of an instruction-set
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FPGA
2005
ACM
107views FPGA» more  FPGA 2005»
13 years 9 months ago
Instruction set extension with shadow registers for configurable processors
Configurable processors are becoming increasingly popular for modern embedded systems (especially for the field-programmable system-on-a-chip). While steady progress has been made...
Jason Cong, Yiping Fan, Guoling Han, Ashok Jaganna...
CHES
2009
Springer
150views Cryptology» more  CHES 2009»
13 years 10 months ago
A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions
Power-based side channel attacks are a significant security risk, especially for embedded applications. To improve the security of such devices, protected logic styles have been p...
Francesco Regazzoni, Alessandro Cevrero, Fran&cced...
DAC
2001
ACM
14 years 4 months ago
Hardware/Software Instruction Set Configurability for System-on-Chip Processors
New application-focused system-on-chip platforms motivate new application-specific processors. Configurable and extensible processor architectures offer the efficiency of tuned lo...
Albert Wang, Earl Killian, Dror E. Maydan, Chris R...
GLVLSI
2007
IEEE
162views VLSI» more  GLVLSI 2007»
13 years 7 months ago
Utilizing custom registers in application-specific instruction set processors for register spills elimination
Application-specific instruction set processor (ASIP) has become an important design choice for embedded systems. It can achieve both high flexibility offered by the base processo...
Hai Lin, Yunsi Fei
DAC
2009
ACM
14 years 4 months ago
Way Stealing:cache-assisted automatic instruction set extensions
This paper introduces Way Stealing, a simple architectural modification to a cache-based processor to increase data bandwidth to and from application-specific Instruction Set Exte...
Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Ch...