29 search results - page 2 / 6 » An Area Efficient Mixed-Signal Test Architecture for Systems... |
BMCBI
2011
12 years 9 months ago
2011
Background: Pairwise sequence alignment methods are widely used in biological research. The increasing number of sequences is perceived as one of the upcoming challenges for seque...
DSD
2005
IEEE
13 years 11 months ago
2005
IEEE
The increasing amount of test data needed to test SOC (System-on-Chip) entails efficient design of the TAM (test access mechanism), which is used to transport test data inside the...
ETS
2007
IEEE
13 years 7 months ago
2007
IEEE
Software-Based Self-Test (SBST) has emerged as an effective strategy for on-line testing of processors integrated in non-safety critical embedded system applications. Among the mo...
KES
2006
Springer
13 years 6 months ago
2006
Springer
This paper presents our implemented, synthesized and tested on demand and partial reconfiguration approaches for FIR filters using Xilinx Virtex FPGAs. Our scope is to implement a ...
INTEGRATION
2008
13 years 4 months ago
2008
This paper presents a Viterbi Decoder (VD) architecture for a programmable data transmission system, implemented using a Field Programmable Gate Array (FPGA) device. This VD has b...