6 search results - page 1 / 2 » An Assembly-Level Execution-Time Model for Pipelined Archite... |
ICCAD
2001
IEEE
14 years 1 months ago
2001
IEEE
The aim of this work is to provide an elegant and accurate static execution timing model for 32-bit microprocessor instruction sets, covering also inter–instruction effects. Suc...
DATE
2010
IEEE
13 years 10 months ago
2010
IEEE
Abstract—This paper addresses the problem of execution time estimation for tasks in a software pipeline independent of the application structure or the underlying architecture. A...
DATE
2010
IEEE
13 years 10 months ago
2010
IEEE
This paper addresses the problem of stochastic task execution time estimation agnostic to the process distributions. The proposed method is orthogonal to the application structure ...
ESTIMEDIA
2006
Springer
13 years 8 months ago
2006
Springer
This paper presents the influence of the loop nest splitting source code optimization on the worst-case execution time (WCET). Loop nest splitting minimizes the number of executed...
ISCA
2012
IEEE
11 years 7 months ago
2012
IEEE
A significant portion of the energy dissipated in modern integrated circuits is consumed by the overhead associated with timing guardbands that ensure reliable execution. Timing ...