Sciweavers

17 search results - page 2 / 4
» An Asynchronous High-Throughput Control Circuit For Proximit...
Sort
View
ASYNC
2006
IEEE
72views Hardware» more  ASYNC 2006»
14 years 6 days ago
Fast Asynchronous Shift Register for Bit-Serial Communication
A fast asynchronous shift register is used as the serializer and de-serializer in a novel bit-serial on-chip communication link. The link employs two-phase transition-based LEDR e...
Rostislav (Reuven) Dobkin, Ran Ginosar, Avinoam Ko...
ISMVL
2005
IEEE
86views Hardware» more  ISMVL 2005»
13 years 11 months ago
Multiple-Valued Duplex Asynchronous Data Transfer Scheme for Interleaving in LDPC Decoders
A novel duplex asynchronous data-transfer scheme based on multiple-valued encoding is proposed for interleaving in Low-Density Parity-Check (LDPC) decoders, where high-throughput ...
Naoya Onizawa, Akira Mochizuki, Takahiro Hanyu
MAM
2011
259views Communications» more  MAM 2011»
13 years 1 months ago
Asynchronous spatial division multiplexing router
Asynchronous quasi-delay-insensitive (QDI) NoCs have several advantages over their clocked counterparts. Virtual channel (VC) is the most utilized flow control method in asynchro...
Wei Song, Doug Edwards
DAC
1996
ACM
13 years 10 months ago
Combined Control Flow Dominated and Data Flow Dominated High-Level Synthesis
This paper presents the design of a Videophone CoderDecoder Motion Estimator using two High-Level Synthesis tools. Indeed, the combination of a Control Flow Dominated part (comple...
Elisabeth Berrebi, Polen Kission, Serge Vernalde, ...
ASYNC
2007
IEEE
131views Hardware» more  ASYNC 2007»
14 years 15 days ago
High Rate Wave-pipelined Asynchronous On-chip Bit-serial Data Link
A high data rate asynchronous bit-serial link for long-range on-chip communication is presented. The data bit cycle time is equal to a single gate delay, enabling 67Gbps throughpu...
Rostislav (Reuven) Dobkin, Yevgeny Perelman, Tuvia...