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DAC
1989
ACM
9 years 7 months ago
An Efficient Finite Element Method for Submicron IC Capacitance Extraction
We present an accurate and efficient method for extraction of parasitic capacitances in submicron integrated circuits. The method uses a 3-D finite element model in which the cond...
N. P. van der Meijs, Arjan J. van Genderen
ASPDAC
1999
ACM
149views Hardware» more  ASPDAC 1999»
9 years 8 months ago
The Hierarchical h-Adaptive 3-D Boundary Element Computation of VLSI Interconnect Capacitance
: In VLSI circuits with deep sub-micron, the parasitic capacitance from interconnect is a very important factor determining circuit performances such as power and time-delay. The B...
Jinsong Hou, Zeyi Wang, Xianlong Hong
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