3 search results - page 1 / 1 » An Evaluation of Staged Run-Time Optimizations in DyC |
PLDI
1999
ACM
13 years 9 months ago
1999
ACM
Previous selective dynamic compilation systems have demonstrated that dynamic compilation can achieve performance improvements at low cost on small kernels, but they have had diff...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
While some leakage power reduction techniques require modification of process technology achieving savings at the fabrication stage, others are based on circuit-level optimization...
ISSS
1997
IEEE
13 years 8 months ago
1997
IEEE
Embedded processor-based systems allow for the tailoring of the on-chip memory architecture based on application-specific requirements. We present an analytical strategy for explo...