Sciweavers

19 search results - page 1 / 4
» An Evolvable Image Filter: Experimental Evaluation of a Comp...
Sort
View
ICES
2005
Springer
195views Hardware» more  ICES 2005»
13 years 10 months ago
Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs
A specialized architecture was developed and evaluated to evolve relatively large sorting networks in an ordinary FPGA. Genetic unit and fitness function are also implemented on t...
Jan Korenek, Lukás Sekanina
AHS
2007
IEEE
210views Hardware» more  AHS 2007»
13 years 11 months ago
Evaluation of a New Platform For Image Filter Evolution
This paper describes a new FPGA implementation of a system for evolutionary image filter design. Three parallel search algorithms are compared. An optimal mutation rate and the q...
Zdenek Vasícek, Lukás Sekanina
FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
13 years 5 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
ACIVS
2006
Springer
13 years 11 months ago
Dedicated Hardware for Real-Time Computation of Second-Order Statistical Features for High Resolution Images
We present a novel dedicated hardware system for the extraction of second-order statistical features from high-resolution images. The selected features are based on gray level co-o...
Dimitris G. Bariamis, Dimitrios K. Iakovidis, Dimi...