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» An FPGA-Based Network Intrusion Detection Architecture
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FCCM
2004
IEEE
269views VLSI» more  FCCM 2004»
13 years 8 months ago
FPGA Based Network Intrusion Detection using Content Addressable Memories
In this paper, we introduce a novel architecture for a hardware based network intrusion detection system (NIDS). Current software-based NIDS are too compute intensive and can not ...
Long Bu, John A. Chandy
FCCM
2005
IEEE
102views VLSI» more  FCCM 2005»
13 years 10 months ago
A Signature Match Processor Architecture for Network Intrusion Detection
In this paper, we introduce a novel architecture for a hardware based network intrusion detection system (NIDS). NIDSs are becoming critical components of the network infrastructu...
Janardhan Singaraju, Long Bu, John A. Chandy
MAM
2008
150views more  MAM 2008»
13 years 4 months ago
FPGA based string matching for network processing applications
String matching is a key problem in many network processing applications. Current implementations of this process using software are time consuming and cannot meet gigabit bandwid...
Janardhan Singaraju, John A. Chandy
SAINT
2003
IEEE
13 years 9 months ago
Challenges in Intrusion Detection for Wireless Ad-hoc Networks
This paper presents a brief survey of current research in intrusion detection for wireless ad-hoc networks. In addition to examining the challenges of providing intrusion detectio...
Paul Brutch, Calvin Ko
ASPDAC
2009
ACM
255views Hardware» more  ASPDAC 2009»
13 years 11 months ago
A low-power FPGA based on autonomous fine-grain power-gating
— This is the first implementation of an FPGA based on autonomous fine-grain power-gating. To cut the power consumption of clock network and detect the activity of the cell e...
Shota Ishihara, Masanori Hariyama, Michitaka Kamey...