Sciweavers

201 search results - page 40 / 41
» An Improved Algorithm for CIOQ Switches
Sort
View
COCO
2005
Springer
130views Algorithms» more  COCO 2005»
13 years 7 months ago
Pseudorandom Bits for Constant Depth Circuits with Few Arbitrary Symmetric Gates
We exhibit an explicitly computable ‘pseudorandom’ generator stretching l bits into m(l) = lΩ(log l) bits that look random to constant-depth circuits of size m(l) with log m...
Emanuele Viola
SIGMOD
2008
ACM
145views Database» more  SIGMOD 2008»
14 years 6 months ago
Optimizing complex queries with multiple relation instances
Today's query processing engines do not take advantage of the multiple occurrences of a relation in a query to improve performance. Instead, each instance is treated as a dis...
Yu Cao, Gopal C. Das, Chee Yong Chan, Kian-Lee Tan
CGO
2010
IEEE
14 years 20 days ago
Integrated instruction selection and register allocation for compact code generation exploiting freeform mixing of 16- and 32-bi
For memory constrained embedded systems code size is at least as important as performance. One way of increasing code density is to exploit compact instruction formats, e.g. ARM T...
Tobias J. K. Edler von Koch, Igor Böhm, Bj&ou...
BMCBI
2010
112views more  BMCBI 2010»
13 years 5 months ago
A parameter-adaptive dynamic programming approach for inferring cophylogenies
Background: Coevolutionary systems like hosts and their parasites are commonly used model systems for evolutionary studies. Inferring the coevolutionary history based on given phy...
Daniel Merkle, Martin Middendorf, Nicolas Wieseke
COMCOM
2004
110views more  COMCOM 2004»
13 years 5 months ago
On the latency and fairness characteristics of pre-order deficit round Robin
In the emerging high-speed packet-switched networks, fair packet scheduling algorithms in switches and routers will form an important component of the mechanisms that seek to sati...
Salil S. Kanhere, Harish Sethu