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» An Integrated SystemC Debugging Environment
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MSE
2003
IEEE
92views Hardware» more  MSE 2003»
13 years 10 months ago
On simulating the IP Market Dynamics in an Academic Environment Using SystemC
As SoC (System-on-a-chip) methodology emerges, IP (Intellectual Property) development and integration will play a major role in the hightech industry. To prepare for this future t...
Ghaiyyur Quraishi, Ravi Shankar
FDL
2005
IEEE
13 years 10 months ago
Implementation of a SystemC based Environment
Verification and validation are key issues for today's SoC design projects. This paper presents the implementation of a SystemC based environment for transaction-based verifi...
Richard Hoffer, Frank Baszynski
DAC
2003
ACM
13 years 10 months ago
A timing-accurate modeling and simulation environment for networked embedded systems
The design of state-of-the-art, complex embedded systems requires the capability of modeling and simulating the complex networked environment in which such systems operate. This i...
Franco Fummi, Giovanni Perbellini, Paolo Gallo, Ma...
ICSM
2007
IEEE
13 years 11 months ago
Debugging Integrated Systems: An Ethnographic Study of Debugging Practice
This paper explores how software developers debug integrated systems, where they have little or no access to the source code of the third-party software the system is composed of....
Thomas Østerlie, Alf Inge Wang
DT
2006
180views more  DT 2006»
13 years 4 months ago
A SystemC Refinement Methodology for Embedded Software
process: Designers must define higher abstraction levels that allow system modeling. They must use description languages that handle both hardware and software components to descri...
Jérôme Chevalier, Maxime de Nanclas, ...