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ISLPED
1997
ACM
124views Hardware» more  ISLPED 1997»
13 years 9 months ago
Low power high level synthesis by increasing data correlation
With the increasing performance and density of VLSI circuits as well as the popularity of portable devices such as personal digital assistance, power consumption has emerged as an...
Dongwan Shin, Kiyoung Choi
ASAP
2007
IEEE
112views Hardware» more  ASAP 2007»
13 years 7 months ago
Scheduling Register-Allocated Codes in User-Guided High-Level Synthesis
In high-level synthesis, as for compilers, an important question is when register assignment should take place. Unlike compilers for which the processor architecture is given, syn...
Alain Darte, C. Quinson
RSP
2005
IEEE
164views Control Systems» more  RSP 2005»
13 years 11 months ago
High Level Synthesis for Data-Driven Applications
Abstract— John von Neumann proposed his famous architecture in a context where hardware was very expensive and bulky. His goal was to maximize functionality with minimal hardware...
Etienne Bergeron, Xavier Saint-Mleux, Marc Feeley,...
CCGRID
2010
IEEE
13 years 6 months ago
A High-Level Interpreted MPI Library for Parallel Computing in Volunteer Environments
Idle desktops have been successfully used to run sequential and master-slave task parallel codes on a large scale in the context of volunteer computing. However, execution of messa...
Troy P. LeBlanc, Jaspal Subhlok, Edgar Gabriel
DATE
2003
IEEE
86views Hardware» more  DATE 2003»
13 years 10 months ago
Layered, Multi-Threaded, High-Level Performance Design
A primary goal of high-level modeling is to efficiently explore a broad design space, converging on an optimal or near-optimal system architecture before moving to a more detaile...
Andrew S. Cassidy, JoAnn M. Paul, Donald E. Thomas