6 search results - page 1 / 2 » An adaptive FPGA architecture with process variation compens... |
DAC
2006
ACM
14 years 5 months ago
2006
ACM
Process induced threshold voltage variations bring about fluctuations in circuit delay, that affect the FPGA timing yield. We propose an adaptive FPGA architecture that compensate...
DAC
2004
ACM
13 years 8 months ago
2004
ACM
The high leakage current in nano-meter regimes is becoming a significant portion of power dissipation in CMOS circuits as threshold voltage, channel length, and gate oxide thickne...
TVLSI
2010
12 years 11 months ago
2010
Dynamic gates have been excellent choice in the design of high-performance modules in modern microprocessors. The only limitation of dynamic gates is their relatively low noise mar...
HPCA
2009
IEEE
13 years 11 months ago
2009
IEEE
As transistor process technology approaches the nanometer scale, process variation significantly affects the design and optimization of high performance microprocessors. Prior stu...
DAC
2006
ACM
14 years 5 months ago
2006
ACM
Increasing source voltage (Source-Biasing) is an efficient technique for reducing gate and sub-threshold leakage of SRAM arrays. However, due to process variation, a higher source...