12 search results - page 2 / 3 » An analytical model relating FPGA architecture parameters to... |
FPL
2009
Springer
13 years 9 months ago
2009
Springer
This paper presents a methodology for estimating and optimising FPGA routing fabrics using high-level modelling and convex optimisation techniques. Experimental methods for explor...
SLIP
2005
ACM
13 years 10 months ago
2005
ACM
The interconnection architecture of FPGAs such as switches dominates performance of FPGAs. Three-dimensional integration of FPGAs overcomes interconnect limitations by allowing in...
IFIP
2003
Springer
13 years 9 months ago
2003
Springer
Wi-Fi hotspots are one of the most promising scenarios for mobile computing. In this scenario, a very limiting factor is the scarcity of mobile-device energetic resources. Both har...
VLSID
2002
IEEE
14 years 4 months ago
2002
IEEE
Predictive delay analysis is presented for a representative CMOS inverter with submicron device size using PREDICTMOS MOSFET model. As against SPICE, which adopts a time consuming...
ICS
2005
Tsinghua U.
13 years 10 months ago
2005
Tsinghua U.
A key step in program optimization is the determination of optimal values for code optimization parameters such as cache tile sizes and loop unrolling factors. One approach, which...