71 search results - page 2 / 15 » An auto-tuning framework for parallel multicore stencil comp... |
COMPSAC
2009
IEEE
14 years 10 days ago
2009
IEEE
IPPS
2007
IEEE
13 years 12 months ago
2007
IEEE
Due to fundamental physical limitations and power constraints, we are witnessing a radical change in commodity microprocessor architectures to multicore designs. Continued perform...
GVD
2009
13 years 3 months ago
2009
The upcoming generation of computer hardware poses several new challenges for database developers and engineers. Software in general and database management systems (DBMSs) in par...
ICS
2009
Tsinghua U.
14 years 10 days ago
2009
Tsinghua U.
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
CISIS
2010
IEEE
13 years 11 months ago
2010
IEEE
—A new parallel programming framework for DNA sequence alignment in homogeneous multi-core processor architectures is proposed. Contrasting with traditional coarse-grained parall...