20 search results - page 4 / 4 » An efficient cache design for scalable glueless shared-memor... |
HPCA
1998
IEEE
13 years 9 months ago
1998
IEEE
The frequency of accesses to remote data is a key factor affecting the performance of all Distributed Shared Memory (DSM) systems. Remote data caching is one of the most effective...
HPCA
2007
IEEE
14 years 5 months ago
2007
IEEE
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, pr...
IPPS
2010
IEEE
13 years 2 months ago
2010
IEEE
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
APSCC
2010
IEEE
13 years 2 months ago
2010
IEEE
Middleware for web service orchestration, such as runtime engines for executing business processes, workflows, or web service compositions, can easily become performance bottleneck...
MICRO
2009
IEEE
13 years 11 months ago
2009
IEEE
A key challenge in architecting a CMP with many cores is maintaining cache coherence in an efficient manner. Directory-based protocols avoid the bandwidth overhead of snoop-based ...