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CHES
2010
Springer
172views Cryptology» more  CHES 2010»
13 years 5 months ago
Analysis and Improvement of the Random Delay Countermeasure of CHES 2009
Random delays are often inserted in embedded software to protect against side-channel and fault attacks. At CHES 2009 a new method for generation of random delays was described tha...
Jean-Sébastien Coron, Ilya Kizhvatov
CHES
2008
Springer
146views Cryptology» more  CHES 2008»
13 years 6 months ago
Power and Fault Analysis Resistance in Hardware through Dynamic Reconfiguration
Dynamically reconfigurable systems are known to have many advantages such as area and power reduction. The drawbacks of these systems are the reconfiguration delay and the overhead...
Nele Mentens, Benedikt Gierlichs, Ingrid Verbauwhe...
CHES
2006
Springer
152views Cryptology» more  CHES 2006»
13 years 8 months ago
Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style
In recent years, some countermeasures against Differential Power Analysis (DPA) at the logic level have been proposed. At CHES 2005 conference, Popp and Mangard proposed a new coun...
Daisuke Suzuki, Minoru Saeki
CHES
2009
Springer
150views Cryptology» more  CHES 2009»
14 years 4 months ago
An Efficient Method for Random Delay Generation in Embedded Software
Random delays are a countermeasure against a range of side channel and fault attacks that is often implemented in embedded software. We propose a new method for generation of rando...
Ilya Kizhvatov, Jean-Sébastien Coron
CHES
2006
Springer
146views Cryptology» more  CHES 2006»
13 years 8 months ago
Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits
This paper presents a Path Swapping (PS) method which enables to enhance the security of Quasi Delay Insensitive Asynchronous Circuits against Power Analysis (PA) attack. This appr...
G. Fraidy Bouesse, Gilles Sicard, Marc Renaudin