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» Analysis of multibackground memory testing techniques
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PLDI
1994
ACM
13 years 10 months ago
Memory Access Coalescing: A technique for Eliminating Redundant memory Accesses
As microprocessor speeds increase, memory bandwidth is increasing y the performance bottleneck for microprocessors. This has occurred because innovation and technological improvem...
Jack W. Davidson, Sanjay Jinturkar
VLSID
2001
IEEE
164views VLSI» more  VLSID 2001»
14 years 6 months ago
An Efficient Parallel Transparent Bist Method For Multiple Embedded Memory Buffers
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das
DATE
2003
IEEE
128views Hardware» more  DATE 2003»
13 years 11 months ago
Virtual Compression through Test Vector Stitching for Scan Based Designs
We propose a technique for compressing test vectors. The technique reduces test application time and tester memory requirements by utilizing part of the predecessor response in co...
Wenjing Rao, Alex Orailoglu
ICST
2008
IEEE
14 years 22 days ago
Pre-testing Flash Device Driver through Model Checking Techniques
Flash memory has become virtually indispensable in most mobile devices, such as mobile phones, digital cameras, mp3 players, etc. In order for mobile devices to successfully provi...
Moonzoo Kim, Yunja Choi, Yunho Kim, Hotae Kim
SP
2008
IEEE
14 years 21 days ago
Preventing Memory Error Exploits with WIT
Attacks often exploit memory errors to gain control over the execution of vulnerable programs. These attacks remain a serious problem despite previous research on techniques to pr...
Periklis Akritidis, Cristian Cadar, Costin Raiciu,...