99 search results - page 2 / 20 » Analysis of power consumption in memory hierarchies |
DAC
2006
ACM
14 years 6 months ago
2006
ACM
The increasing use of Multiprocessor Systems-on-Chip (MPSoCs) for high performance demands of embedded applications results in high power dissipation. The memory subsystem is a la...
DATE
1999
IEEE
13 years 10 months ago
1999
IEEE
This paper proposes a methodology to evaluate the effects of encodings on the power consumption of system-level buses in the presence of multi-level cache memories. The proposed m...
DATE
2006
IEEE
13 years 12 months ago
2006
IEEE
Reduced energy consumption is one of the most important design goals for embedded application domains like wireless, multimedia and biomedical. Instruction memory hierarchy has be...
ICS
2005
Tsinghua U.
13 years 11 months ago
2005
Tsinghua U.
The combination of increasing component power consumption, a desire for denser systems, and the required performance growth in the face of technology-scaling issues are posing eno...
ISCA
1997
IEEE
13 years 9 months ago
1997
IEEE
Portable systems demand energy efficiency in order to maximize battery life. IRAM architectures, which combine DRAM and a processor on the same chip in a DRAM process, are more en...