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TACAS
2010
Springer
210views Algorithms» more  TACAS 2010»
13 years 11 months ago
Automatic Analysis of Scratch-Pad Memory Code for Heterogeneous Multicore Processors
Modern multicore processors, such as the Cell Broadband Engine, achieve high performance by equipping accelerator cores with small “scratchpad” memories. The price for increase...
Alastair F. Donaldson, Daniel Kroening, Philipp R&...
RTCSA
1999
IEEE
13 years 9 months ago
A Method to Improve the Estimated Worst-Case Performance of Data Caching
This paper presents a method for tight prediction of worst-case performance of data caches in highperformance real-time systems. Our approach is to distinguish between data struct...
Thomas Lundqvist, Per Stenström
SIGMETRICS
2003
ACM
199views Hardware» more  SIGMETRICS 2003»
13 years 10 months ago
Data cache locking for higher program predictability
Caches have become increasingly important with the widening gap between main memory and processor speeds. However, they are a source of unpredictability due to their characteristi...
Xavier Vera, Björn Lisper, Jingling Xue
EMSOFT
2007
Springer
13 years 11 months ago
WCET estimation for executables in the presence of data caches
This paper describes techniques to estimate the worst case execution time of executable code on architectures with data caches. The underlying mechanism is Abstract Interpretation...
Rathijit Sen, Y. N. Srikant
RTSS
2003
IEEE
13 years 10 months ago
Data Caches in Multitasking Hard Real-Time Systems
Data caches are essential in modern processors, bridging the widening gap between main memory and processor speeds. However, they yield very complex performance models, which make...
Xavier Vera, Björn Lisper, Jingling Xue